Icarus Verilog 編譯器

Verilog

基本語法

型態

全域變數

基本元件

多樣的寫法

指定

assign

always

initial

運算式

分枝

迴圈

模組

函數

Task

陣列

輸出入

觀察

真值表

測試程式

訊息顯示

注意事項

模擬程序

硬體工程

程式範例

Xor

Xor3

全加器

加法器

加減器

快速加法器

乘法器

ALU

閂鎖器

脈衝偵測

計數器

多工器

暫存器群

記憶體

延遲問題

浮點數

狀態機

程式計數器

CPU0-Mini

CPU0

pipeline

工具

QuartusII

Icarus

Veritek

訊息

相關網站

參考文獻

最新修改

簡體版

English

下載

  1. Icarus Verilog for Windows — http://bleyer.org/icarus/
  2. Icarus Verilog — http://iverilog.icarus.com/

程式範例

  module main;

  initial
    begin
      $display("Hello, World");
      $finish ;
    end

  endmodule

執行結果

D:\ccc101>cd icarus

D:\ccc101\icarus>iverilog -o hello hello.v

D:\ccc101\icarus>vvp hello
Hello, World

原始說明
By a text editor (or copy hello.vl from the Icarus Verilog examples directory) arrange for this program to be in a text file, "hello.vl". Next, compile this program with a command like this:

% iverilog -o hello hello.vl

The results of this compile are placed into the file "hello", as the "-o" flag tells the compiler where to place the compiled result. Next, execute the compiled program like so:

% vvp hello
Hello, World

在 Windows 中安裝

The easiest way to install under Windows is to get a precompiled installer for the version you wish to install. Icarus Verilog is distributed for Windows users as a self-installing .exe. Just execute the installer and follow the instructions. During the install, take note of the directory where the program is installed: for example,

C:\iverilog is a good place to install.

Once the binary is installed, you need to add the bin directory to your execution path. The executables you need are in C:\iverilog\bin, where the "C:\iverilog" part is actually the root of where you installed the package. The programs are in the bin subdirectory. Put this directory in your PATH environment variable, and the above commands become accessible to you at the command line prompt, or even in batch files.

範例二

D:\ccc101\icarus\samples>iverilog -o sqrt sqrt.vl

D:\ccc101\icarus\samples>vvp sqrt
                   0 main.acc = 0000000000000000
                 225 main.acc = 0000000000000100
                 235 main.acc = 0000000000000110
sqrt(        63) -->     7
                 245 main.acc = 0000000000000111

範例三

D:\ccc101\icarus\samples>iverilog -o ifsr16 ifsr16.v
ifsr16.v: No such file or directory
No top level modules, and no -s option.

D:\ccc101\icarus\samples>iverilog -o lfsr16 lfsr16.v

D:\ccc101\icarus\samples>vvp lfsr16
VCD info: dumpfile lfsr16.vcd opened for output.
xxxxx
10000
00001
00011
00111
01111
11110
11101
11010
10101
01011
10110
01100
11001
10010
00100
01000
10000
00001
00011
00111
01111
11110
11101
11010
10101
01011
10110
01100
11001
10010
00100
01000
10000

參考文獻

  1. Icarus Verilog
  2. Icarus Verilog for Windows
  3. GPL EDA

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