CPUF 處理器 -- 有浮點數運算 FADD, FSUB, FMUL, FDIV

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CPU0-Mini

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pipeline

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English

輸入指令檔:cpu0f.hex

26 00 00 24  //  0           JMP RESET
26 00 00 04  //  4           JMP ERROR
26 00 00 04  //  8           JMP IRQ
26 FF FF FA  //  c    ERROR: JMP ERROR
00 90 00 24  // 10    IRQ:   LD  R9, TIMER
08 A0 00 01  // 14           LDI R10,1
13 99 A0 00  // 18           ADD R9, R9, R10
01 90 00 24  // 1C           ST  R9, TIMER
2D 00 00 00  // 20           IRET
00 00 00 00  // 24    TIMER: WORD 0
00 D0 00 BA  // 28    RESET: LD  R13, StackEnd
30 E0 00 00  // 2c           PUSH R14
08 40 00 04  // 30           LDI R4, 4
08 50 00 08  // 34           LDI R5, 8
00 10 00 C2  // 38           LD  R1, f1
00 20 00 C6  // 3c           LD  R2, f2
41 31 20 00  // 40           FADD R3, R1, R2
42 31 20 00  // 44           FSUB R3, R1, R2
43 31 20 00  // 48           FMUL R3, R1, R2
44 31 20 00  // 4c           FDIV R3, R1, R2
10 45 00 00  // 50           CMP R4, R5
25 00 00 10  // 54           JGE L1
22 00 00 0C  // 58           JLT L1
24 00 00 08  // 5c           JLE L1
21 00 00 04  // 60           JNE L1
26 00 00 00  // 64           JMP L1
08 10 00 0A  // 68   L1:     LDI R1, 10
2B 00 00 08  // 6c           CALL SUM
31 E0 00 00  // 70           POP R14
2C 00 00 00  // 74           RET
30 E0 00 00  // 78   SUM:    PUSH     R14
12 30 00 00  // 7c           MOV      R3, R0     // R3 = i = 0
02 4F 00 24  // 80           LDB      R4, k1     // R4 = 1
08 20 00 00  // 84           LDI      R2, 0      // SUM = R2 = 0
13 22 30 00  // 88   LOOP:      ADD      R2, R2, R3 // SUM = SUM + i
13 33 40 00  // 8c           ADD      R3, R3, R4 // i = i + 1
10 31 00 00  // 90           CMP      R3, R1     // if (i < R1)
24 FF FF F0  // 94           JLE      LOOP       //   goto LOOP
01 2F 00 0D  // 98           ST       R2, s
03 3F 00 0D  // 9c           STB      R3, i
31 E0 00 00  // a0           POP      R14
2C 00 00 00  // a4           RET                    // return
01           // a8   k1:     BYTE 1                // char K1=1
00 00 00 00  // a9   s:      WORD 0                // int s
00           // ad   i:      BYTE 0                // char i=1
00 01 02 03  // ae Stack:   BYTE 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 , 10, 11
04 05 06 07  // b2
08 09 0A 0B  // b6
00 00 00 BA  // ba StackEnd: WORD StackEnd
01 02 03 04  // be Data:    BYTE 0, 1, 2, 3, 4, 5, 6, 7, 8 
40 48 F5 C2  // c2 f1:        WORD 3.14  // 3.14  = 0100 0000 0100 1000 1111 0101 1100 0010 = 40 48 F5 C2
42 C8 00 00  // c6 f2:        WORD 100.0 // 100.0 = 0100 0010 1100 1000 0000 0000 0000 0000 = 42 C8 00 00

Verilog 程式:cpu0f.v

// 參考文獻:http://ccckmit.wikidot.com/ocs:cpu0
// 定義:寬度形態常數
`define INT32 2'b11     // 寬度 32 位元
`define INT24 2'b10     // 寬度 24 位元
`define INT16 2'b01     // 寬度 16 位元
`define BYTE  2'b00     // 寬度  8 位元
// itype 的選項:RESET:重置中斷,ABORT:關機中斷,IRQ:硬體中斷,ERROR:錯誤中斷
`define EXE 3'b000
`define RESET 3'b001
`define ABORT 3'b010
`define IRQ 3'b011
`define ERROR 3'b100

module cpu0(input clock, reset, input [2:0] itype, output reg [2:0] tick, 
             output reg [31:0] ir, pc, mar, mdr, inout [31:0] dbus, 
             output reg m_en, m_rw, output reg [1:0] m_w1);
    reg signed [31:0] R [0:15];
    reg [7:0] op;
    reg [3:0] a, b, c;
    reg signed [11:0] cx12;
    reg signed [15:0] cx16;
    reg signed [23:0] cx24;
    reg [4:0] c5;
    reg signed [31:0] c12, c16, c24, Ra, Rb, Rc, ipc; // ipc:instruction PC

    // 暫存器簡稱
    `define PC   R[15]   // 程式計數器
    `define LR   R[14]   // 連結暫存器
    `define SP   R[13]   // 堆疊暫存器
    `define SW   R[12]   // 狀態暫存器
    // 狀態暫存器旗標位元
    `define N    `SW[31] // 負號旗標
    `define Z    `SW[30] // 零旗標
    `define C    `SW[29] // 進位旗標
    `define V    `SW[28] // 溢位旗標
    `define I    `SW[7]  // 硬體中斷許可
    `define T    `SW[6]  // 軟體中斷許可
    `define M    `SW[0]  // 模式位元
    // 指令編碼表
    parameter [7:0] LD=8'h00,ST=8'h01,LDB=8'h02,STB=8'h03,LDR=8'h04,STR=8'h05,
    LBR=8'h06,SBR=8'h07,LDI=8'h08,CMP=8'h10,MOV=8'h12,ADD=8'h13,SUB=8'h14,
    MUL=8'h15,DIV=8'h16,AND=8'h18,OR=8'h19,XOR=8'h1A,ROL=8'h1C,ROR=8'h1D,
    SHL=8'h1E,SHR=8'h1F,JEQ=8'h20,JNE=8'h21,JLT=8'h22,JGT=8'h23,JLE=8'h24,
    JGE=8'h25,JMP=8'h26,SWI=8'h2A,CALL=8'h2B,RET=8'h2C,IRET=8'h2D,
    PUSH=8'h30,POP=8'h31,PUSHB=8'h32,POPB=8'h33, 
    FADD=8'h41, FSUB=8'h42, FMUL=8'h43, FDIV=8'h44;

    reg inInt = 0;

    task memReadStart(input [31:0] addr, input [1:0] w1); begin // 讀取記憶體 Word
       mar = addr;     // read(m[addr])
       m_rw = 1;     // 讀取模式:read 
       m_en = 1;     // 啟動讀取
       m_w1 = w1;
    end    endtask

    task memReadEnd(output [31:0] data); begin // 讀取記憶體完成,取得資料
       mdr = dbus; // 取得記憶體傳回的 dbus = m[addr]
       data = mdr; // 傳回資料
       m_en = 0; // 讀取完畢
    end    endtask

    // 寫入記憶體 -- addr:寫入位址, data:寫入資料
    task memWriteStart(input [31:0] addr, input [31:0] data, input [1:0] w1); begin 
       mar = addr;    // write(m[addr], data)
       mdr = data;
       m_rw = 0;    // 寫入模式:write
       m_en = 1;     // 啟動寫入
       m_w1  = w1;
    end    endtask

    task memWriteEnd; begin // 寫入記憶體完成
       m_en = 0; // 寫入完畢
    end endtask

    task regSet(input [3:0] i, input [31:0] data); begin
        if (i!=0) R[i] = data;
    end endtask

    task f32to64(input [31:0] x32, output [63:0] x64); 
    reg [10:0] e;
    begin
        e = {3'b0, x32[30:23]};
        e = e + (1023 - 127);
        x64 = {x32[31], e, x32[22:0], 29'b0};
    end endtask

    task f64to32(input [63:0] x64, output [31:0] x32); 
    reg [10:0] e;
    begin
        e = {x64[62:52]};
        e = e + (127-1023);
        x32 = {x64[63], e[7:0], x64[51-:23]};
    end endtask

    task falu32(input [31:0] a32, input [31:0] b32, input [1:0] op, output [31:0] y32);
    reg [63:0] a64, b64, y64;
    real a, b, y;
    begin
        f32to64(a32, a64); a = $bitstoreal(a64);
        f32to64(b32, b64); b = $bitstoreal(b64); 
        case (op)
            2'b00: y = a + b;
            2'b01: y = a - b;
            2'b10: y = a * b;
            2'b11: y = a / b;
        endcase
         $display("falu32:op=%d a=%f b=%f y=%f", op, a, b, y);
        y64 = $realtobits(y);
        f64to32(y64, y32);
    end
    endtask

    task taskInterrupt(input [2:0] iMode); begin
    if (inInt==0) begin
        case (iMode)
            `RESET: begin `PC = 0; tick = 0; R[0] = 0; `SW = 0; `LR = -1; end
            `ABORT: begin `LR = `PC; `PC = 4; end
            `IRQ:   begin `LR = `PC; `PC = 8; end
            `ERROR: begin `LR = `PC; `PC = 12; end
        endcase
        $display("taskInterrupt(%3b)", iMode);
        inInt = 1;
    end
    end endtask

    task taskExecute; begin
            tick = tick+1;
            m_en = 0;
            case (tick)    
                1: begin  // Tick 1 : 指令擷取,將 PC 丟到位址匯流排上,memory.read(m[PC])
                    memReadStart(`PC, `INT32);
                    ipc  = `PC;
                    `PC = `PC+4;
                end
                2: begin  // Tick 2 : 指令解碼,ir = m[PC]
                    memReadEnd(ir); // IR = dbus = m[PC]
                    {op,a,b,c,cx12} = ir;
                    cx24 = ir[23:0];
                    cx16 = ir[15:0];
                    c5  = ir[4:0];
                    c12 = cx12; // 取出 cx12 並轉為 32 位元有號數 c12
                    c16 = cx16; // 取出 cx16 並轉為 32 位元有號數 c16
                    c24 = cx24; // 取出 cx24 並轉為 32 位元有號數 c24
                    Ra = R[a];
                    Rb = R[b];
                    Rc = R[c];
                end
                3: begin // Tick 3 : 指令執行
                    case (op)
                        // 載入儲存指令
                        LD:  memReadStart(Rb+c16, `INT32);         // 載入word;    LD Ra, [Rb+Cx];     Ra<=[Rb+ Cx]
                        ST:  memWriteStart(Rb+c16, Ra, `INT32); // 儲存word;    ST Ra, [Rb+ Cx];     Ra=>[Rb+ Cx]
                        LDB: memReadStart(Rb+c16, `BYTE);        // 載入byte;    LDB Ra, [Rb+ Cx];     Ra<=(byte)[Rb+ Cx]
                        STB: memWriteStart(Rb+c16, Ra, `BYTE);     // 儲存byte;    STB Ra, [Rb+ Cx];    Ra=>(byte)[Rb+ Cx]
                        LDR: memReadStart(Rb+Rc, `INT32);        // LD的Rc版;     LDR Ra, [Rb+Rc];    Ra<=[Rb+ Rc]
                        STR: memWriteStart(Rb+Rc, Ra, `INT32);    // ST的Rc版;    STR Ra, [Rb+Rc];    Ra=>[Rb+ Rc]
                        LBR: memReadStart(Rb+Rc, `BYTE);        // LDB的Rc版;    LBR Ra, [Rb+Rc];    Ra<=(byte)[Rb+ Rc]
                        SBR: memWriteStart(Rb+Rc, Ra, `BYTE);    // STB的Rc版;    SBR Ra, [Rb+Rc];    Ra=>(byte)[Rb+ Rc]
                        LDI: R[a] = Rb+c16;                     // 立即載入;    LDI Ra, Rb+Cx;        Ra<=Rb + Cx
                        // 運算指令
                        CMP: begin `N=(Ra-Rb<0);`Z=(Ra-Rb==0); end // 比較;        CMP Ra, Rb;         SW=(Ra >=< Rb)
                        MOV: regSet(a, Rb);                 // 移動;            MOV Ra, Rb;         Ra<=Rb
                        ADD: regSet(a, Rb+Rc);                // 加法;            ADD Ra, Rb, Rc;     Ra<=Rb+Rc
                        SUB: regSet(a, Rb-Rc);                // 減法;            SUB Ra, Rb, Rc;     Ra<=Rb-Rc
                        MUL: regSet(a, Rb*Rc);                // 乘法;             MUL Ra, Rb, Rc;     Ra<=Rb*Rc
                        DIV: regSet(a, Rb/Rc);                // 除法;             DIV Ra, Rb, Rc;     Ra<=Rb/Rc
                        AND: regSet(a, Rb&Rc);                // 位元 AND;        AND Ra, Rb, Rc;     Ra<=Rb and Rc
                        OR:  regSet(a, Rb|Rc);                // 位元 OR;            OR Ra, Rb, Rc;         Ra<=Rb or Rc
                        XOR: regSet(a, Rb^Rc);                // 位元 XOR;        XOR Ra, Rb, Rc;     Ra<=Rb xor Rc
                        SHL: regSet(a, Rb<<c5);                // 向左移位;        SHL Ra, Rb, Cx;     Ra<=Rb << Cx
                        SHR: regSet(a, Rb>>c5);                // 向右移位;        SHR Ra, Rb, Cx;     Ra<=Rb >> Cx
                        // 跳躍指令
                        JEQ: if (`Z) `PC=`PC+c24;            // 跳躍 (相等);        JEQ Cx;        if SW(=) PC  PC+Cx
                        JNE: if (!`Z) `PC=`PC+c24;            // 跳躍 (不相等);    JNE Cx;     if SW(!=) PC  PC+Cx
                        JLT: if (`N)`PC=`PC+c24;        // 跳躍 ( < );        JLT Cx;     if SW(<) PC  PC+Cx
                        JGT: if (!`N&&!`Z) `PC=`PC+c24;        // 跳躍 ( > );        JGT Cx;     if SW(>) PC  PC+Cx
                        JLE: if (`N || `Z) `PC=`PC+c24;        // 跳躍 ( <= );        JLE Cx;     if SW(<=) PC  PC+Cx    
                        JGE: if (!`N || `Z) `PC=`PC+c24;    // 跳躍 ( >= );        JGE Cx;     if SW(>=) PC  PC+Cx
                        JMP: `PC = `PC+c24;                     // 跳躍 (無條件);    JMP Cx;     PC <= PC+Cx
                        SWI: begin `LR=`PC;`PC= c24; `I = 1'b1; end // 軟中斷;    SWI Cx;         LR <= PC; PC <= Cx; INT<=1
                        CALL:begin `LR=`PC;`PC=`PC + c24; end // 跳到副程式;    CALL Cx;     LR<=PC; PC<=PC+Cx
                        RET: begin `PC=`LR; end                // 返回;            RET;         PC <= LR
                        IRET:begin `PC=`LR;`I = 1'b0; end    // 中斷返回;        IRET;         PC <= LR; INT<=0
                        // 堆疊指令    
                        PUSH:begin `SP = `SP-4; memWriteStart(`SP, Ra, `INT32); end // 推入 word;    PUSH Ra;    SP-=4;[SP]<=Ra;
                        POP: begin memReadStart(`SP, `INT32); `SP = `SP + 4; end    // 彈出 word;    POP Ra;     Ra=[SP];SP+=4;
                        PUSHB:begin `SP = `SP-1; memWriteStart(`SP, Ra, `BYTE); end    // 推入 byte;    PUSHB Ra;     SP--;[SP]<=Ra;(byte)
                        POPB:begin memReadStart(`SP, `BYTE); `SP = `SP+1; end        // 彈出 byte;    POPB Ra;     Ra<=[SP];SP++;(byte)
                        FADD:begin falu32(Rb, Rc, 2'b00, Ra); regSet(a, Ra); end
                        FSUB:begin falu32(Rb, Rc, 2'b01, Ra); regSet(a, Ra); end
                        FMUL:begin falu32(Rb, Rc, 2'b10, Ra); regSet(a, Ra); end
                        FDIV:begin falu32(Rb, Rc, 2'b11, Ra); regSet(a, Ra); end
                    endcase
                end
                4: begin // 讀取寫入指令完成,關閉記憶體
                    case (op)
                        LD, LDB, LDR, LBR, POP, POPB  : memReadEnd(R[a]); // 讀取記憶體完成
                        ST, STB, STR, SBR, PUSH, PUSHB: memWriteEnd(); // 寫入記憶體完成
                    endcase
                    $display("%4dns %8x : %8x R[%02d]=%-8x=%-d SW=%8x", $stime, ipc, ir, a, R[a], R[a], `SW);
                    if (op==RET && `PC < 0) begin
                        $display("RET to PC < 0, finished!");
                        $finish;
                    end
                    tick = 0;
                end                
            endcase
    end endtask

    always @(posedge clock) begin
        if (reset) begin
            taskInterrupt(`RESET);
        end else if (tick == 0 && itype != `EXE) begin
            taskInterrupt(itype);
        end else begin
            inInt = 0;
            taskExecute();
        end
        pc = `PC;
    end
endmodule

module memory0(input clock, reset, en, rw, input [1:0] m_w1, 
                input [31:0] abus, dbus_in, output [31:0] dbus_out);
reg [7:0] m [0:258];
reg [31:0] data;

integer i;
initial begin
    $readmemh("cpu0f.hex", m);
    for (i=0; i < 255; i=i+4) begin
       $display("%8x: %8x", i, {m[i], m[i+1], m[i+2], m[i+3]});
    end
end

    always @(clock or abus or en or rw or dbus_in) 
    begin
        if (abus >=0 && abus <= 255) begin
            if (en == 1 && rw == 0) begin // r_w==0:write
                data = dbus_in;
                case (m_w1)
                    `BYTE:  {m[abus]} = dbus_in[7:0];
                    `INT16: {m[abus], m[abus+1] } = dbus_in[15:0];
                    `INT24: {m[abus], m[abus+1], m[abus+2]} = dbus_in[24:0];
                    `INT32: {m[abus], m[abus+1], m[abus+2], m[abus+3]} = dbus_in;
                endcase
            end else if (en == 1 && rw == 1) begin// r_w==1:read
                case (m_w1)
                    `BYTE:  data = {8'h00  , 8'h00,   8'h00,   m[abus]      };
                    `INT16: data = {8'h00  , 8'h00,   m[abus], m[abus+1]    };
                    `INT24: data = {8'h00  , m[abus], m[abus+1], m[abus+2]  };
                    `INT32: data = {m[abus], m[abus+1], m[abus+2], m[abus+3]};
                endcase
            end else
                data = 32'hZZZZZZZZ;
        end else
            data = 32'hZZZZZZZZ;
    end
    assign dbus_out = data;
endmodule

module main;
reg clock, reset;
reg [2:0] itype;
wire [2:0] tick;
wire [31:0] pc, ir, mar, mdr, dbus;
wire m_en, m_rw;
wire [1:0] m_w1;

cpu0 cpu(.clock(clock), .reset(reset), .itype(itype), .pc(pc), .tick(tick), .ir(ir),
.mar(mar), .mdr(mdr), .dbus(dbus), .m_en(m_en), .m_rw(m_rw), .m_w1(m_w1));

memory0 mem(.clock(clock), .reset(reset), .en(m_en), .rw(m_rw), .m_w1(m_w1), 
.abus(mar), .dbus_in(mdr), .dbus_out(dbus));

initial begin
  clock = 0;
  reset = 1;
  #200 reset = 0; itype=`EXE;
  #100000 $finish;
end

always #1000 begin
  itype = `IRQ; #200 itype = `EXE;
end

always #10 clock=clock+1;

endmodule

執行結果

D:\oc\float>iverilog cpu0f.v -o cpu0f

D:\oc\float>vvp cpu0f
WARNING: cpu0f.v:231: $readmemh(cpu0f.hex): Not enough words in the file for the
 requested range [0:258].
00000000: 26000024
00000004: 26000004
00000008: 26000004
0000000c: 26fffffa
00000010: 00900024
00000014: 08a00001
00000018: 1399a000
0000001c: 01900024
00000020: 2d000000
00000024: 00000000
00000028: 00d000ba
0000002c: 30e00000
00000030: 08400004
00000034: 08500008
00000038: 001000c2
0000003c: 002000c6
00000040: 41312000
00000044: 42312000
00000048: 43312000
0000004c: 44312000
00000050: 10450000
00000054: 25000010
00000058: 2200000c
0000005c: 24000008
00000060: 21000004
00000064: 26000000
00000068: 0810000a
0000006c: 2b000008
00000070: 31e00000
00000074: 2c000000
00000078: 30e00000
0000007c: 12300000
00000080: 024f0024
00000084: 08200000
00000088: 13223000
0000008c: 13334000
00000090: 10310000
00000094: 24fffff0
00000098: 012f000d
0000009c: 033f000d
000000a0: 31e00000
000000a4: 2c000000
000000a8: 01000000
000000ac: 00000001
000000b0: 02030405
000000b4: 06070809
000000b8: 0a0b0000
000000bc: 00ba0102
000000c0: 03044048
000000c4: f5c242c8
000000c8: 0000xxxx
000000cc: xxxxxxxx
000000d0: xxxxxxxx
000000d4: xxxxxxxx
000000d8: xxxxxxxx
000000dc: xxxxxxxx
000000e0: xxxxxxxx
000000e4: xxxxxxxx
000000e8: xxxxxxxx
000000ec: xxxxxxxx
000000f0: xxxxxxxx
000000f4: xxxxxxxx
000000f8: xxxxxxxx
000000fc: xxxxxxxx
taskInterrupt(001)
 270ns 00000000 : 26000024 R[00]=00000000=0          SW=00000000
 350ns 00000028 : 00d000ba R[13]=000000ba=186        SW=00000000
 430ns 0000002c : 30e00000 R[14]=ffffffff=-1         SW=00000000
 510ns 00000030 : 08400004 R[04]=00000004=4          SW=00000000
 590ns 00000034 : 08500008 R[05]=00000008=8          SW=00000000
 670ns 00000038 : 001000c2 R[01]=4048f5c2=1078523330 SW=00000000
 750ns 0000003c : 002000c6 R[02]=42c80000=1120403456 SW=00000000
falu32:op=0 a=3.140000 b=100.000000 y=103.140000
 830ns 00000040 : 41312000 R[03]=42ce47ae=1120815022 SW=00000000
falu32:op=1 a=3.140000 b=100.000000 y=-96.860000
 910ns 00000044 : 42312000 R[03]=c2c1b851=-1027491759 SW=00000000
falu32:op=2 a=3.140000 b=100.000000 y=313.999987
 990ns 00000048 : 43312000 R[03]=439cffff=1134362623 SW=00000000
taskInterrupt(011)
1270ns 00000008 : 26000004 R[00]=00000000=0          SW=00000000
1350ns 00000010 : 00900024 R[09]=00000000=0          SW=00000000
1430ns 00000014 : 08a00001 R[10]=00000001=1          SW=00000000
1510ns 00000018 : 1399a000 R[09]=00000001=1          SW=00000000
1590ns 0000001c : 01900024 R[09]=00000001=1          SW=00000000
1670ns 00000020 : 2d000000 R[00]=00000000=0          SW=00000000
falu32:op=3 a=3.140000 b=100.000000 y=0.031400
1750ns 0000004c : 44312000 R[03]=3d009d48=1023450440 SW=00000000
1830ns 00000050 : 10450000 R[04]=00000004=4          SW=80000000
1910ns 00000054 : 25000010 R[00]=00000000=0          SW=80000000
1990ns 00000058 : 2200000c R[00]=00000000=0          SW=80000000
2070ns 00000068 : 0810000a R[01]=0000000a=10         SW=80000000
2150ns 0000006c : 2b000008 R[00]=00000000=0          SW=80000000
2230ns 00000078 : 30e00000 R[14]=00000070=112        SW=80000000
taskInterrupt(011)
2470ns 00000008 : 26000004 R[00]=00000000=0          SW=80000000
2550ns 00000010 : 00900024 R[09]=00000001=1          SW=80000000
2630ns 00000014 : 08a00001 R[10]=00000001=1          SW=80000000
2710ns 00000018 : 1399a000 R[09]=00000002=2          SW=80000000
2790ns 0000001c : 01900024 R[09]=00000002=2          SW=80000000
2870ns 00000020 : 2d000000 R[00]=00000000=0          SW=80000000
2950ns 0000007c : 12300000 R[03]=00000000=0          SW=80000000
3030ns 00000080 : 024f0024 R[04]=00000001=1          SW=80000000
3110ns 00000084 : 08200000 R[02]=00000000=0          SW=80000000
3190ns 00000088 : 13223000 R[02]=00000000=0          SW=80000000
3270ns 0000008c : 13334000 R[03]=00000001=1          SW=80000000
3350ns 00000090 : 10310000 R[03]=00000001=1          SW=80000000
3430ns 00000094 : 24fffff0 R[15]=00000088=136        SW=80000000
taskInterrupt(011)
3670ns 00000008 : 26000004 R[00]=00000000=0          SW=80000000
3750ns 00000010 : 00900024 R[09]=00000002=2          SW=80000000
3830ns 00000014 : 08a00001 R[10]=00000001=1          SW=80000000
3910ns 00000018 : 1399a000 R[09]=00000003=3          SW=80000000
3990ns 0000001c : 01900024 R[09]=00000003=3          SW=80000000
4070ns 00000020 : 2d000000 R[00]=00000000=0          SW=80000000
4150ns 00000088 : 13223000 R[02]=00000001=1          SW=80000000
4230ns 0000008c : 13334000 R[03]=00000002=2          SW=80000000
4310ns 00000090 : 10310000 R[03]=00000002=2          SW=80000000
4390ns 00000094 : 24fffff0 R[15]=00000088=136        SW=80000000
4470ns 00000088 : 13223000 R[02]=00000003=3          SW=80000000
4550ns 0000008c : 13334000 R[03]=00000003=3          SW=80000000
4630ns 00000090 : 10310000 R[03]=00000003=3          SW=80000000
taskInterrupt(011)
4870ns 00000008 : 26000004 R[00]=00000000=0          SW=80000000
4950ns 00000010 : 00900024 R[09]=00000003=3          SW=80000000
5030ns 00000014 : 08a00001 R[10]=00000001=1          SW=80000000
5110ns 00000018 : 1399a000 R[09]=00000004=4          SW=80000000
5190ns 0000001c : 01900024 R[09]=00000004=4          SW=80000000
5270ns 00000020 : 2d000000 R[00]=00000000=0          SW=80000000
5350ns 00000094 : 24fffff0 R[15]=00000088=136        SW=80000000
5430ns 00000088 : 13223000 R[02]=00000006=6          SW=80000000
5510ns 0000008c : 13334000 R[03]=00000004=4          SW=80000000
5590ns 00000090 : 10310000 R[03]=00000004=4          SW=80000000
5670ns 00000094 : 24fffff0 R[15]=00000088=136        SW=80000000
5750ns 00000088 : 13223000 R[02]=0000000a=10         SW=80000000
5830ns 0000008c : 13334000 R[03]=00000005=5          SW=80000000
taskInterrupt(011)
6070ns 00000008 : 26000004 R[00]=00000000=0          SW=80000000
6150ns 00000010 : 00900024 R[09]=00000004=4          SW=80000000
6230ns 00000014 : 08a00001 R[10]=00000001=1          SW=80000000
6310ns 00000018 : 1399a000 R[09]=00000005=5          SW=80000000
6390ns 0000001c : 01900024 R[09]=00000005=5          SW=80000000
6470ns 00000020 : 2d000000 R[00]=00000000=0          SW=80000000
6550ns 00000090 : 10310000 R[03]=00000005=5          SW=80000000
6630ns 00000094 : 24fffff0 R[15]=00000088=136        SW=80000000
6710ns 00000088 : 13223000 R[02]=0000000f=15         SW=80000000
6790ns 0000008c : 13334000 R[03]=00000006=6          SW=80000000
6870ns 00000090 : 10310000 R[03]=00000006=6          SW=80000000
6950ns 00000094 : 24fffff0 R[15]=00000088=136        SW=80000000
7030ns 00000088 : 13223000 R[02]=00000015=21         SW=80000000
taskInterrupt(011)
7270ns 00000008 : 26000004 R[00]=00000000=0          SW=80000000
7350ns 00000010 : 00900024 R[09]=00000005=5          SW=80000000
7430ns 00000014 : 08a00001 R[10]=00000001=1          SW=80000000
7510ns 00000018 : 1399a000 R[09]=00000006=6          SW=80000000
7590ns 0000001c : 01900024 R[09]=00000006=6          SW=80000000
7670ns 00000020 : 2d000000 R[00]=00000000=0          SW=80000000
7750ns 0000008c : 13334000 R[03]=00000007=7          SW=80000000
7830ns 00000090 : 10310000 R[03]=00000007=7          SW=80000000
7910ns 00000094 : 24fffff0 R[15]=00000088=136        SW=80000000
7990ns 00000088 : 13223000 R[02]=0000001c=28         SW=80000000
8070ns 0000008c : 13334000 R[03]=00000008=8          SW=80000000
8150ns 00000090 : 10310000 R[03]=00000008=8          SW=80000000
8230ns 00000094 : 24fffff0 R[15]=00000088=136        SW=80000000
taskInterrupt(011)
8470ns 00000008 : 26000004 R[00]=00000000=0          SW=80000000
8550ns 00000010 : 00900024 R[09]=00000006=6          SW=80000000
8630ns 00000014 : 08a00001 R[10]=00000001=1          SW=80000000
8710ns 00000018 : 1399a000 R[09]=00000007=7          SW=80000000
8790ns 0000001c : 01900024 R[09]=00000007=7          SW=80000000
8870ns 00000020 : 2d000000 R[00]=00000000=0          SW=80000000
8950ns 00000088 : 13223000 R[02]=00000024=36         SW=80000000
9030ns 0000008c : 13334000 R[03]=00000009=9          SW=80000000
9110ns 00000090 : 10310000 R[03]=00000009=9          SW=80000000
9190ns 00000094 : 24fffff0 R[15]=00000088=136        SW=80000000
9270ns 00000088 : 13223000 R[02]=0000002d=45         SW=80000000
9350ns 0000008c : 13334000 R[03]=0000000a=10         SW=80000000
9430ns 00000090 : 10310000 R[03]=0000000a=10         SW=40000000
taskInterrupt(011)
9670ns 00000008 : 26000004 R[00]=00000000=0          SW=40000000
9750ns 00000010 : 00900024 R[09]=00000007=7          SW=40000000
9830ns 00000014 : 08a00001 R[10]=00000001=1          SW=40000000
9910ns 00000018 : 1399a000 R[09]=00000008=8          SW=40000000
9990ns 0000001c : 01900024 R[09]=00000008=8          SW=40000000
10070ns 00000020 : 2d000000 R[00]=00000000=0          SW=40000000
10150ns 00000094 : 24fffff0 R[15]=00000088=136        SW=40000000
10230ns 00000088 : 13223000 R[02]=00000037=55         SW=40000000
10310ns 0000008c : 13334000 R[03]=0000000b=11         SW=40000000
10390ns 00000090 : 10310000 R[03]=0000000b=11         SW=00000000
10470ns 00000094 : 24fffff0 R[15]=00000098=152        SW=00000000
10550ns 00000098 : 012f000d R[02]=00000037=55         SW=00000000
10630ns 0000009c : 033f000d R[03]=0000000b=11         SW=00000000
taskInterrupt(011)
10870ns 00000008 : 26000004 R[00]=00000000=0          SW=00000000
10950ns 00000010 : 00900024 R[09]=00000008=8          SW=00000000
11030ns 00000014 : 08a00001 R[10]=00000001=1          SW=00000000
11110ns 00000018 : 1399a000 R[09]=00000009=9          SW=00000000
11190ns 0000001c : 01900024 R[09]=00000009=9          SW=00000000
11270ns 00000020 : 2d000000 R[00]=00000000=0          SW=00000000
11350ns 000000a0 : 31e00000 R[14]=00000070=112        SW=00000000
11430ns 000000a4 : 2c000000 R[00]=00000000=0          SW=00000000
11510ns 00000070 : 31e00000 R[14]=ffffffff=-1         SW=00000000
11590ns 00000074 : 2c000000 R[00]=00000000=0          SW=00000000
RET to PC < 0, finished!

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